Tanja Braun, group manager at Fraunhofer Institute for Reliability and Microintegration (IZM), sat down with Semiconductor Engineering to talk about III-V device packaging, chiplets, fan-out and panel ...
A panel-level (PL) approach to fan-out (FO) packaging has been discussed for several years to reduce the cost of chip-first FO packaging based on redistribution layer (RDL) technology. More recently, ...
FREUDENSTADT, Germany, April 30, 2026 (GLOBE NEWSWIRE)-- SCHMID Group (NASDAQ: SHMD), a global leader in advanced manufacturing solutions for the electronics and semiconductor industries, is advancing ...
World's first 310mm × 310mm panel-level packaging (PLP) Electrochemical Deposition (ECD) production system delivered to customer line Omni x-series covering 310mm, 510mm, and 700mm platforms, enabling ...
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